1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method of fabricating a semiconductor device which comprises a high-melting point refractory metal pillar to connect between a device element and a wiring or between wirings.
2. Description of the Related Art
In conventional semiconductor devices, contact holes for connecting between the semiconductor device elements and the wirings, and via holes for mutual connection between upper and lower wirings are designed with the widths of the wirings larger than the diameters of those contact holes and via holes in consideration of misalignment displacement between the devices and the wirings, or between the wirings, so that the wirings do not miss the holes due to the wide margin even when such displacement is caused, thereby ensuring electrical connection. However, with the increase in the degree of integration of semiconductor devices, the contact holes and via holes have become more and more minuscule, and the above-mentioned displacement margin, i.e., the difference in size of the holes and the wirings is being diminished accordingly, and is recently closing in to almost zero.
In addition, although the diameters of the contact holes and the via holes have been reduced, their depths remain unchanged, and this naturally results in increased aspect ratios (the dept/diameter ratios of the holes) which cause poor coverage with aluminum formed by the conventional sputtering methods. As a result, the problem has arisen that the connection resistance is increased and the wirings tend to be disconnected. For these reasons, it is presently usual to fill in such holes with tungsten (W) formed by chemical vapor deposition (CVD) which exhibits excellent covering properties. When no positioning margins are provided between the holes and the wirings, and when the holes are filled in with tungsten pillars, however, the areas of connection between the tungsten and the wirings are reduced if displacement is caused during formation of the upper wirings. This leads to increased connection resistance, as well as an additional problem of increased tendency for the connection resistance to increase due to electro-migration. These problems are described in, for example, in an article titled "The Dependence of Electromigration Endurance on Contact Area in W-Viahole", Abstract No. 19a-ZD-4, in Extended Abstracts (The Autumn Meeting, 1994) of the Japan Society of Applied Physics.
Therefore, in order to reduce the connection resistance between the hole-filling tungsten pillars and the upper wirings, it has been suggested to provide the tungsten pillars with portions protruding above the holes to obtain additional connections with the sides of the tungsten pillars to thereby lower the resistance (see for example, Japanese Unexamined Patent Application Disclosure (KOKAI) HEI 5-311394). With such a structure in which the tungsten pillars protrude through the holes, the heights of the protrusions of the tungsten pillars through the holes must be appropriately controlled. As a method for the control, there has been suggested a method in which: an interlayer insulation film is first formed of two insulation films with different etch rates, a hole is made through the films, the hole is filled in with a conductor, and the upper insulation film is etched off under such conditions that the etch rate of the upper insulation film is higher than the etch rate of the lower insulation film (see, for example Japanese Unexamined Patent Application Disclosure (KOKAI) HEI 5-318939).
An example of the formation of such a contact hole will now be described with reference to FIG. 7. First, as illustrated in FIG. 7(a), a silicon oxide film 32 and a silicon nitride film 33 are successively formed on a device-formed silicon substrate 31 by CVD. The film thickness of the silicon oxide film 32 is set to a necessary amount to provide insulation between the silicon substrate 31 and the wiring layer, and the film thickness of the silicon nitride film 33 is set to be the same as the height of protrusion of the conductor pillar through the contact hole. A contact hole which extends to the silicon substrate 31 is then made through the silicon nitride film 33 and the silicon oxide film 32 by conventional lithography and reactive ion etching. Thereafter, titanium 34 and titanium nitride 35 are successively laminated by sputtering, and then, tungsten 36 is grown by low pressure chemical vapor deposition (LPCVD) to a film thickness greater than or equal to the radius of the contact hole so as to fill in the contact hole with the tungsten.
Then, as illustrated in FIG. 7(b), the entire surface of the tungsten 36 is etched by reactive ion etching until the titanium nitride 35 is exposed, and the entire surfaces of the titanium nitride 35 and the titanium 34 are then etched by reactive ion etching as well until the silicon nitride film 33 is exposed, thereby forming a pillar of tungsten 36 left only in the contact hole.
The silicon nitride film 33 is then removed by plasma etching so that the pillar of the tungsten 36 protrudes through the contact hole, as illustrated in FIG. 7(c). The height of the protrusion of the pillar of the tungsten 36 through the contact hole is made to be the same as the thickness of the silicon nitride film 33.
Thereafter, as illustrated in FIG. 7(d), an aluminum alloy 37 is formed by sputtering, and the aluminum alloy 37 is then patterned into a desired configuration by conventional lithography and dry etching, to form an aluminum wiring. With the configuration of the contact hole made in this way, therefore, the connection with the aluminum alloy is ensured at both the top surface of the pillar of the tungsten 36 and the side of the protrusion to thereby prevent increase in the electrical resistance.
However, when the positioning margin between the contact hole and the aluminum wiring is small, the displacement causes exposure of some portions of the tungsten 36. This has presented the following problems. A first problem is that the exposure of the tungsten causes generation of defects in portions of the aluminum alloy located near the exposed portions of the tungsten, and thus reliability of the device is decreased. This is because aluminum and tungsten have different ionization tendencies, thus causing the aluminum to be dissolved due to a local battery cell effect generated during water rinsing procedures after the aluminum alloy has been etched.
A second problem involves difficulties associated with planarization of the interlayer insulation film formed on the aluminum wiring and difficulty in establishing connection through the via hole penetrating the interlayer insulation film. This is because the wiring layer on the contact hole section is elevated by the height of the protrusion through the contact hole making it difficult to form a flat interlayer insulation film 38 overlying the entire wiring layer, particularly when two or more contact holes are located close to each other under the wiring layer, as illustrated in FIG. 8(a), in which case a cavity is formed between the wirings causing the reliability of the device to decrease. In addition, since planarization of the interlayer insulation film 38 results in the portion of the interlayer insulation film 38 other than the portion over the contact hole to have a greater thickness, corresponding to the height of the tungsten pillar 36 protrusion than required, that a via hole formed on such a portion has a correspondingly increased depth than actually necessary.